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Special Relativity in Financial Modeling 1.0.0
Lorentz transforms, spacetime classification, and geodesic price paths for quantitative finance
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Runtime SIMD capability detection for the SRFM acceleration layer. More...
#include <cstdint>Go to the source code of this file.
Namespaces | |
| namespace | srfm |
| namespace | srfm::simd |
| namespace | srfm::simd::detail |
Enumerations | |
| enum class | srfm::simd::SimdLevel : std::uint8_t { srfm::simd::SCALAR = 0 , srfm::simd::SSE42 = 1 , srfm::simd::AVX2 = 2 , srfm::simd::AVX512F = 3 } |
| Ordered enumeration of SIMD capability tiers. More... | |
Functions | |
| void | srfm::simd::detail::cpuid (std::uint32_t leaf, std::uint32_t subleaf, std::uint32_t out[4]) noexcept |
| std::uint64_t | srfm::simd::detail::xgetbv (std::uint32_t xcr) noexcept |
| Read XCR0 (used to verify OS XSAVE support for YMM/ZMM state). | |
| bool | srfm::simd::detail::os_saves_ymm () noexcept |
| Probe OS support for YMM (AVX) register save/restore. | |
| bool | srfm::simd::detail::os_saves_zmm () noexcept |
| Probe OS support for ZMM (AVX-512) register save/restore. | |
| SimdLevel | srfm::simd::detect_simd_level () noexcept |
| bool | srfm::simd::has_avx512f () noexcept |
| Returns true when AVX-512F is available on this CPU/OS. | |
| bool | srfm::simd::has_avx2 () noexcept |
| Returns true when AVX2 is available on this CPU/OS. | |
| bool | srfm::simd::has_sse42 () noexcept |
| Returns true when SSE 4.2 is available on this CPU/OS. | |
| const char * | srfm::simd::simd_level_name (SimdLevel level) noexcept |
| Human-readable name for a SimdLevel value. | |
Runtime SIMD capability detection for the SRFM acceleration layer.
Module: include/srfm/simd/ Owner: AGT-08 (AVX-512 SIMD Acceleration) — 2026-03-01
Probe the executing CPU at start-up for the widest SIMD instruction set available, and expose the result as a strongly-typed enum so that the dispatch layer can select the correct kernel at zero per-call overhead.
Supported levels (highest wins): SCALAR — always available; pure C++ reference path SSE42 — SSE 4.2 (128-bit, 2 doubles per register) AVX2 — AVX2 (256-bit, 4 doubles per register) AVX512F — AVX-512F (512-bit, 8 doubles per register)
• detect_simd_level() is thread-safe: result is computed once. • No dynamic allocation, no exceptions, noexcept throughout. • Portable: supports GCC/Clang (__builtin_cpu_supports) and MSVC (__cpuid / __cpuidex).
• Verifying OS support (XSAVE/XGETBV) — assumed present if CPUID advertises the feature and the OS is modern (≥ Win10 / Linux ≥ 4.x). • AVX-512 sub-features beyond F (VL, DQ, BW) — only F is required.
Definition in file cpu_features.hpp.